Verigy 93k Tester Manual Online

: Engineers use SmarTest to define "test flows" and "test suites." These organize how the hardware interacts with the Device Under Test (DUT).

The "Verigy 93K tester manual" is a vast and powerful knowledge base, essential for anyone working with this advanced semiconductor test platform. While the platform has transitioned from Verigy to Advantest, its core principles remain unchanged. verigy 93k tester manual

Determine the routing behavior based on the test outcome. For instance, if the test fails, route the flow directly to a Hard Bin (e.g., Bin 5: Functional Fail ) to optimize test time. 4. Troubleshooting, Calibration, and Diagnostic Routines : Engineers use SmarTest to define "test flows"

Verigy 93k Tester Manual: An In-Depth Guide to V93000 SoC Testing Determine the routing behavior based on the test outcome

What is the or failing test behavior?

The 93K’s hardware documentation is extensive, primarily because of its modular architecture. Core to any operation is the . The system supports various pin modules, such as the PS800 digital pin electronics, which are the basic building blocks for connecting the tester to the Device Under Test (DUT). This modular approach allows for flexible configuration, enabling users to add or remove pin modules as needed, with some configurations supporting up to 1,024 digital signal pins. The physical interface between the tester and the DUT is often a pogo tower , and ensuring correct mechanical and electrical compatibility is a key step defined in hardware setup procedures.